Sr. Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING 

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.  Together, we advance your career.  

THE ROLE: 

We are looking for a Sr. Design Verification Engineer – Graphics IP / Geometry Engine who is adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

THE PERSON: 

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES: 

• Create, reuse, and debug SV UVM testbench components to support efficient pre-silicon design verification.
• Author detailed test plans for new features, covering interactions with other features, hardware, firmware, and software driver use cases.
• Develop and maintain UVM tests for both functional and power verification.
• Build and validate performance verification models at the IP block level to complete performance verification.
• Collaborate with architects, RTL designers, and verification/firmware engineers to achieve verification closure for Graphics Geometry Engine IPs within project schedules.
• Maintain and enhance test libraries to support IP block-level testing.
• Debug and analyze regression failures to identify root causes; work with RTL and firmware engineers to resolve design defects and test issues.
• Develop functional coverage models and perform functional/code coverage analysis, adding or refining tests and constraints to meet coverage goals.
• Mentor junior engineers and co-op students by providing technical guidance and support.

PREFERRED EXPERIENCE: 

• Hands-on experience with HDL languages like System Verilog  and industry standard verification methodologies like UVM.
• Familiarity with scripting languages like Python and Perl.
• Familiarity with C/C++ for reference models.
• Experience/Background on Computing/Graphics is a benefit 
• Experience with OpenGL/OpenCL/D3D programming is a benefit 

 ACADEMIC CREDENTIALS: 

• Undergrad degree required. Bachelors or Masters degree in computer engineering/Electrical Engineering preferred.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.