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Analog Design, Staff Engineer

Ottawa, ON
  • Nombre de poste(s) à combler : 1

  • À discuter
  • Date d'entrée en fonction : 1 poste à combler dès que possible

Category Engineering Hire Type Employee Job ID 14000 Remote Eligible No Date Posted 22/01/2026

We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a growing analog and mixed signal R&D team developing high speed analog integrated circuits in the world’s most advanced technologies. Working from SERDES standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.

You are expected to independently resolve a wide range of issues in creative ways on a regular basis and to exercise independent judgment in selecting methods and techniques to obtain solutions. Furthermore, you are expected to perform in project leadership role, contribute to complex aspects of a project, determine and develop approaches to solutions and to guide more junior peers with aspects of their job.

What You'll Be Doing:

  • Review SERDES standards to develop novel transceiver architectures and sub-block specifications.
  • Investigate and develop circuit architectures that address architectural bottlenecks and lead to revolutionary improvements in power, area, and performance targets.
  • Oversee physical layout to minimize the effect of parasitics, device stress, and process variation.
  • Present and review simulation data from internal project teams.
  • Document design features and test plans.
  • Consult on the overall electrical characterization of the SERDES IP product. Review customer silicon data for design enhancements. Propose solutions for post-silicon design updates.


The Impact You Will Have:

  • Driving the next generation of high-speed data communication through pioneering SERDES architectures.
  • Enabling Synopsys customers to achieve industry-leading performance, power efficiency, and reliability in their products.
  • Fostering a culture of technical excellence and innovation within a diverse, high-caliber design team.
  • Accelerating project timelines by streamlining design and verification methodologies.
  • Enhancing the overall quality and competitiveness of Synopsys IP offerings through expert problem-solving and continuous improvement.
  • Mentoring and developing junior engineers, strengthening the team's collective expertise and future leadership pipeline.


What You'll Need:

  • Ph.D., M.Sc. with 3+ years, or B.Sc. with 5+ years of practical analog IC design experience; degree in Electrical Engineering or Computer Engineering or other relevant field of study.
  • In depth familiarity with transistor level circuit design - sound CMOS design fundamentals.
  • Detailed design experience with one, and familiarity with several other SERDES sub-circuits: receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, DAC.
  • Familiarity with custom digital design (i.e. high-speed logic paths).
  • Experience with analog/digital interactions for optimizing circuit performance (calibration, adaptation, timing-handoff, etc).
  • Understanding of design for reliability (i.e. EM, IR, aging, etc.) and layout effects (i.e. matching, reliability, proximity effects, etc.) as well as ESD issues (i.e. circuit techniques, layout).
  • Experience with tools for schematic entry, physical layout, and design verification.
  • Understanding of SPICE simulators and simulation methods.
  • Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
  • Experience with TCL, Perl, C, Python, MATLAB, or other scripting languages is desired.
  • Excellent communication, presentation, and documentation skills.


Who You Are:

  • Innovative thinker with a solutions-oriented approach to complex technical challenges.
  • Effective communicator, adept at translating intricate technical details for diverse audiences.
  • Collaborative team player who thrives in multidisciplinary environments.
  • Natural mentor and leader, committed to supporting and uplifting peers and junior engineers.
  • Highly organized, detail-oriented, and proactive in driving project deliverables.
  • Resilient and adaptable, embracing new technologies and methodologies with enthusiasm.


The Team You'll Be A Part Of:
You'll join a dynamic, growing analog and mixed-signal design team focused on developing cutting-edge Multi-Gbps SERDES IP. The team is composed of passionate engineers from diverse backgrounds, collaborating closely with digital designers, layout specialists, and software/CAD experts. Our culture emphasizes technical excellence, innovation, and continuous learning. With access to best-in-class design tools and in-house support, this team thrives on solving industry-defining challenges and delivering world-class IP to Synopsys' global customers.

Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com.


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